Packages provide the interconnect from a chip to a printed circuit board (PCB). The package also provides protection for the chip from the environment. The overall objective of the package design is to provide these features at the lowest possible manufacturing cost.
A common process employed in semiconductor packaging is wire bonding, wherein a fine wire is connected between semiconductor die pads and inner ends of package lead fingers.
In one packaging scheme, a semiconductor die is mounted within an opening in a package having external leads (or pins). Bond pads on the die are wired to terminals within the package, and a lid is mounted over the opening containing the die. This type of package is usually formed of ceramic, and is relatively expensive to manufacture.
Another technique for packaging integrated circuit devices is mounting the die to a die attach pad on a lead frame, connecting the die to various inner lead fingers of the lead frame, and encapsulating the die, either with epoxy or with a plastic molding compound. Plastic packages are preferred by most commercial users for their low cost and low weight. Plastic packaging is discussed in the main, hereinafter.
As chips become more complex, their packages require more pins (or external leads), and hence become larger in size. Transfer molding large plastic packages involves the transfer of large amounts of melted plastic, and the injection of the plastic can cause bond wires connecting the chip to the leadframe to move and short against each other (wire sweep). Also, because of the set cure characteristics of plastic molding compound, a large molded body has a tendency to warp, causing difficulties when packages are mounted to a PCB.
Molding the entire package body ("fully molded") usually requires that the leadframe has a "dambar", namely a continuous ring of metal surrounding the body that prevents the plastic from flowing out of the mold cavity between the external leads of the leadframe. The dambar then has to be removed to isolate individual leads before the package is usable. With high pin count packages, the leads are often delicate and spaced closely (fine pitch), resulting in the need for very fine precision tooling for the trimming operation. This type of tooling is also very expensive, which adds to the overall cost of packaging.
Molding of the plastic around the leadframe also causes some leakage of the plastic onto the leadframe (flashing). The flash then has to be removed in a separate de-flashing (dejunking) step.
Attention is directed to commonly-owned U.S. Pat. No. 5,051,813, entitled PLASTIC-PACKAGED SEMICONDUCTOR DEVICE HAVING LEAD SUPPORT AND ALIGNMENT STRUCTURE, which discloses plastic packaging with and without dambars, dejunking, etc.
In the main, hereinafter, molding where the mold gate is disposed at the parting plane of the two mold halves is discussed, as most pertinent to the present invention.
The following U.S. Pat. Nos. are cited of general interest in the field of packaging (annotations in parentheses): 3,405,441 (hermetic sealing process using glass and metal lid on a ceramic substrate); 3,909,838 (package formed by sealing two halves or pre-molded body around a molded pill package bonded to a leadframe); 4,143,456 (glob top sealing devices mounted on a substrate); 4,264,917 (silicon substrate with glob top encapsulation); 4,300,153 (TAB device with a substrate bonded to the bottom of the die; glob top encapsulation); 4,330,790 (tape-mounted device encapsulated using a metal carrier and epoxy); 4,363,076 (flat TAB assembly); 4,507,675 (molded heatsink package); 4,594,770 (bonding a metal cap and a plastic cap around a leadframe); 4,857,483 (mold gate is not located at the parting plane of the mold halves); 4,872,825 (encapsulation method using a lamination process instead of injection or transfer molding); 4,874,722 (pre-molded flatpack encapsulated with silicone gel; dambar required; not encapsulated by molding); 4,890,152 (molded pin grid array package; not a surface mount flatpack construction); 4,913,930 (coating and encapsulating a device in a reel-to-reel format); 4,955,132 (flip chip mounting to a substrate); 4,961,105 (die back metallization); 4,974,057 (die coated with resin and then molded); 4,975,765 (high density flatpack with edge connectors; not a molded package); 4,982,265 (stackable TAB); 4,984,059 (leadframe tips overlap the top of the die surface); 4,996,587 (thin, stackable package); and 5,025,114 (leadframe construction resulting in multilayer structure for plastic packages).